course-details-portlet

IIK4100 - Hardware Security in Embedded Systems

About

New from the academic year 2024/2025

Examination arrangement

Examination arrangement: Project Work Assignment
Grade: Letter grades

Evaluation Weighting Duration Grade deviation Examination aids
Termpaper 50/100
School exam 50/100 3 hours B

Course content

This course aims to equip students with a robust foundation in hardware security, enabling them to effectively address and counter hardware security challenges in critical sector applications. Students will delve into various aspects of hardware security, including the life cycle of integrated circuits, supply chain security, hardware reverse engineering, and practical countermeasures against hardware security threats.

The course also unfolds contemporary and emerging topics like Physical Attacks, Tamper Protections, Lightweight Cryptography, Side-channel attacks, Fault Injection, Hardware Trojan Detection and Prevention in Printed Circuit board (PCB), Memory Extraction through UART/JTAG, Counterfeit Detection and Prevention. Through a blend of theoretical lectures, practical labs, and independent research, students will get a comprehensive understanding and hands-on experience in hardware security, from the chip to the system level.

This course aligns with key UN Sustainable Development Goals (SDGs): SDG 9.1 pertains to secure infrastructure development for economic growth and well-being.; SDGs 17.6 and 17.7 promote technology development, transfer, and dissemination. Sub-Goal 17.7 capacity building encourages sharing knowledge and international cooperation for enhancing global security and sustainable development.

Learning outcome

Knowledge:

  • Advance a comprehensive understanding of Hardware Security within Embedded Systems and its importance in critical sector applications.
  • Advanced knowledge of the life cycle of integrated circuits, supply chain security, and hardware reverse engineering.
  • Understand contemporary and emerging threats and methods for detection and prevention.

Skills:

  • Ability to critically analyse existing theories and methods for studying hardware security and to independently apply such methods to related applications.
  • Acquire hands-on experience in dealing with hardware security challenges from the chip to the system level through practical labs.

General competence:

  1. Develop competence in identifying, analysing, and mitigating hardware security threats in real-world scenarios.
  2. Develop the capability to conduct independent research in the field of hardware security, contributing to ongoing developments in the domain.

Learning methods and activities

The course is planned with lectures, guest lectures, hands-on lab exercises, and term paper assignments. Students are encouraged to collaborate, form groups, and collectively choose a term paper topic for their term paper, which should be related to an active research area covered in the course. The approval of group-wise oral presentations of term papers is required to complete group work successfully.

The course will be accessible to campus and remote students via the online learning management system on a best-effort basis.

Further on evaluation

Forms of assessment:

The final grade is an average of the written examination (50%) and term paper (50%), which must be passed (ie, E grade or higher) to pass the course.

Re-sit:

If the course is to be re-sit, the written exam will be repeated (In August), while the term paper may be accepted after approval.

Specific conditions

Admission to a programme of study is required:
Cyber Security and Data Communication (MTKOM)
Digital Infrastructure and Cyber Security (MSTCNNS)
Electronic Systems Design (MSELSYS)
Electronics System Design and Innovation (MTELSYS)
Embedded Computing Systems (MSECS)
Information Security (MIS)
Information Security (MISD)

Course materials

M. Tehranipoor and C. Wang (Eds.), Introduction to Hardware Security and Trust, Springer, 2011. 2012, ISBN: 978-1-4419-8079-3.

S. Bhunia, M. Tehranipoor, Hardware Security: A Hands-on Learning Approach. Morgan Kaufmann, 2018, ISBN: 9780128124772.

At the beginning of the semester, a comprehensive set of course materials, including presentations, research articles, books, and video recordings, will be provided with electronic learning management systems.

More on the course

No

Facts

Version: 1
Credits:  7.5 SP
Study level: Second degree level

Coursework

Term no.: 1
Teaching semester:  AUTUMN 2024

Language of instruction: English

Location: Gjøvik , Trondheim

Subject area(s)
  • Applied Information and Communication Technology
Contact information
Course coordinator:

Department with academic responsibility
Department of Information Security and Communication Technology

Examination

Examination arrangement: Project Work Assignment

Term Status code Evaluation Weighting Examination aids Date Time Examination system Room *
Autumn ORD School exam 50/100 B INSPERA
Room Building Number of candidates
Autumn ORD Termpaper 50/100 INSPERA
Room Building Number of candidates
Summer UTS School exam 50/100 B INSPERA
Room Building Number of candidates
  • * The location (room) for a written examination is published 3 days before examination date. If more than one room is listed, you will find your room at Studentweb.
Examination

For more information regarding registration for examination and examination procedures, see "Innsida - Exams"

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