course-details-portlet

IELET2113 - Programmable Circuits

About

Examination arrangement

Examination arrangement: School exam
Grade: Letter grades

Evaluation Weighting Duration Grade deviation Examination aids
School exam 100/100 4 hours E

Course content

Programmable logic circuits. Structure of digital systems. Description of digital HW by using high level programming language. Design and simulation of digital systems.

Learning outcome

Knowledge

The candidate must be able to:

- Explain the architecture and operation of programmable circuits.

- Explain the difference between combinatorial and sequential digital logic.

- Explain how a finite state machine is built and works.

- Explain how a high-level modeling language can be used to describe the structure and operation of a digital system.

- Explain how a digital system can be tested and verified.

Skills

The candidate must be able to:

- Use a high-level modeling language to describe simple digital systems.

- Use computer tools to implement digital systems in a programmable circuit.

- Use computer tools and testbenches to simulate the functionality of a digital system.

General competence

The candidate must be able to:

- Specify, design and implement a digital system.

Learning methods and activities

Lectures. Problem solving. Project work. Guidance.

Compulsory exercises that include training in computer tools and programming in VHDL.

Compulsory project.

Compulsory assignments

  • Compulsory assignment

Further on evaluation

Written digital exam. Grade: Letter grade.

In the event of a re-sit examination in May/June, the examination may be changed to an oral examination.

Approved compulsory work requirements are valid until the following academic year.

Specific conditions

Admission to a programme of study is required:
Electrical Engineering (BIELEKTRO)

Required previous knowledge

Access to the course requires admission to the study program Bachelor in Electrical Engineering (BIELEKTRO).

Course materials

Stated at the start of the semester.

Credit reductions

Course code Reduction From To
IELEG2143 7.5 AUTUMN 2024
More on the course

No

Facts

Version: 1
Credits:  7.5 SP
Study level: Third-year courses, level III

Coursework

Term no.: 1
Teaching semester:  AUTUMN 2024

Language of instruction: Norwegian

Location: Trondheim

Subject area(s)
  • Electronics
Contact information
Course coordinator: Lecturer(s):

Department with academic responsibility
Department of Electronic Systems

Examination

Examination arrangement: School exam

Term Status code Evaluation Weighting Examination aids Date Time Examination system Room *
Autumn ORD School exam 100/100 E 2024-11-25 09:00 INSPERA
Room Building Number of candidates
SL415 Sluppenvegen 14 23
SL120 Sluppenvegen 14 2
SL322 Sluppenvegen 14 1
Spring UTS School exam 100/100 E INSPERA
Room Building Number of candidates
  • * The location (room) for a written examination is published 3 days before examination date. If more than one room is listed, you will find your room at Studentweb.
Examination

For more information regarding registration for examination and examination procedures, see "Innsida - Exams"

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